-rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c | 22 | ||||
-rw-r--r-- | drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h | 1 |
diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c b/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c index a5bd0f7..57a279e 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_platform.c @@ -958,6 +958,15 @@ static int DWC_ETH_QOS_get_dts_config(struct platform_device *pdev) EMACDBG("qcom,pinctrl-names present\n"); } + /*read qcom,phy-reset-delay-msecs value from dtsi */ + if (of_property_read_u32_array( + pdev->dev.of_node,"qcom,phy-reset-delay-msecs", + dwc_eth_qos_res_data.phy_reset_delay_msecs,2)) { + //resource qcom,phy-reset-delay-msecs is not present, set delay to 10ms and 50 ms + dwc_eth_qos_res_data.phy_reset_delay_msecs[0] = 10; + dwc_eth_qos_res_data.phy_reset_delay_msecs[1] = 50; + } + return ret; err_out: @@ -1622,12 +1631,19 @@ static int DWC_ETH_QOS_init_gpios(struct device *dev) EMAC_GPIO_PHY_RESET_NAME); goto gpio_error; } - mdelay(1); + if (dwc_eth_qos_res_data.phy_reset_delay_msecs[0]) { + EMACDBG("phy Hw pre reset delay in msecs %d\n",dwc_eth_qos_res_data.phy_reset_delay_msecs[0]); + mdelay(dwc_eth_qos_res_data.phy_reset_delay_msecs[0]); + } gpio_set_value(dwc_eth_qos_res_data.gpio_phy_reset, PHY_RESET_GPIO_HIGH); EMACDBG("PHY is out of reset successfully\n"); - /* Add delay of 50ms so that phy should get sufficient time*/ - mdelay(50); + + if (dwc_eth_qos_res_data.phy_reset_delay_msecs[1]) { + /* Add delay of 50ms so that phy should get sufficient time*/ + EMACDBG("phy Hw post reset delay in msecs %d\n",dwc_eth_qos_res_data.phy_reset_delay_msecs[1]); + mdelay(dwc_eth_qos_res_data.phy_reset_delay_msecs[1]); + } } return ret; diff --git a/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h b/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h index 0eda7bb..7bd2f6f 100644 --- a/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h +++ b/drivers/emac-dwc-eqos/DWC_ETH_QOS_yheader.h @@ -1593,6 +1593,7 @@ struct DWC_ETH_QOS_res_data { bool is_pinctrl_names; int gpio_phy_intr_redirect; int gpio_phy_reset; + int phy_reset_delay_msecs[2]; /* Regulators */ struct regulator *gdsc_emac; |