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2014-09-09Ensure that we only compile the proper bitwidth bitcode for an architecture.Stephen Hines1-0/+17
Bug: 16031597 Prior to this change, it was possible to compile 32-bit bitcode for a 64-bit architecture and/or 64-bit bitcode for a 32-bit architecture. This change enforces that the target architecture's pointer width matches the pointer width of the individual RS triples that we work with. Change-Id: Ida65582875fb061911fc6a92cd99454f1ab6c5e6
2014-07-31Fixes AArch64 struct calling convention issue.Chris Wailes1-5/+49
Change-Id: I9a760c1238ff8b30e0a29a2cd11a030b17b283e2
2014-07-25Update libbcc for LLVM rebase to r212749.Stephen Hines4-12/+11
Change-Id: I40304090ada740c2451d32e01c7deed4f4c8c409
2014-07-16Deprecate rs_fp_imprecise.Jean-Luc Brouillet1-17/+13
If rs_fp_imprecise is specified, issue a warning and use rs_fp_relaxed instead. Change-Id: I054fa32128bda60a6d22a0a6a590cd9f3575a2ca
2014-07-15Add override to force the CPU variant.Tim Murray1-0/+17
Change-Id: I5bed6d1c064c0e48b370acd3e9d3c2a5e39ffea4
2014-07-07Merge "Adds support for multi-input kernels to libbcc."Stephen Hines1-57/+126
2014-06-30Adds support for multi-input kernels to libbcc.Chris Wailes1-57/+126
This patch modifies libbcc in the following ways: * Adjusted the data-layout of the LLVM version of RsForEachStubParamStruct to accommodate a pointer to an array of input allocations and a pointer to an array of stride sizes for each of these allocations. * Changed how some LLVM values are stored in ExpandKernel. * Causes expanded multi-input kernels to extract input allocation base pointers from a field in the param strcut and load values from these allocations appropriately. * Causes expanded multi-input kernels to use the provided dynamic input stride sizes if no appropriate static type information is present. * Modified bitinfo to support a new development API target which is used to version gate support for multi-input kernels. Change-Id: I46d2834c37075b2a2407fd8b010546818a4540d1
2014-06-30Merge "Fix 64 bit issue in sha1.c"Jean-Luc Brouillet2-34/+34
2014-06-30Fix 64 bit issue in sha1.cJean-Luc Brouillet2-34/+34
Use uint32_t instead of unsigned long. Changed unsigned char to uint8_t for consistency. Note that the length is still a 32 bit value. At some point, we could change it to a 64 bit value. Change-Id: Ia3126ee46741d7ec5f6a249fd60b9951a416e929
2014-06-26Use build fingerprint and compile command for caching.Jean-Luc Brouillet4-88/+148
If either of those have changed, we need to invalidate the compiled bit code. Change-Id: I9b5cdc19e29237dc7fb2ec1627a167f3f8987702
2014-06-19Change cache dependency tracking.Jean-Luc Brouillet6-379/+70
Remove the fix dependencies and make it depend only on the source hash. More changes coming soon to add dependencies on the Android build fingerprint and the command line used to compile. Change-Id: I8964044affccf52326ce286f879307eca79d0b24
2014-06-18Merge "Fix build break caused by missing ifdefs."Tim Murray2-3/+3
2014-06-18Fix build break caused by missing ifdefs.Tim Murray2-3/+3
Change-Id: I29e8e1c58b9702873a2a4b932794720ee279492e
2014-06-17Merge "Don't require libclcore_neon.bc on AArch64."Tim Murray1-6/+6
2014-06-17Merge "Don't use bionic's sha1 functionality."Dan Albert1-4/+4
2014-06-17Don't use bionic's sha1 functionality.Dan Albert1-4/+4
Bionic is getting rid of its SHA1 in favor of openssl's. Change-Id: Ia64e1f6bb9633fccdb5bb61c0d6e4af599b8c938
2014-06-16Simple cleanups in RSForEachExpand.cppChris Wailes1-161/+166
Re-named single character variable names. Re-named some variables for clarity. Factored out type construction code to only occur once every time the pass is run on a module. Removed unnecessary temporary vectors. Removed a check for an invariant guaranteed by another function. Added some assertions. Change-Id: I0debcc301ed28f4ecaf7dadcaada604e3eff9830
2014-06-16Don't require libclcore_neon.bc on AArch64.Tim Murray1-6/+6
Change-Id: Ieb4eea41f74917c201a07aa8b246816430fcac5c
2014-06-02Merge "Update libbcc for ARM64."Tim Murray1-5/+0
2014-05-30Update libbcc for LLVM 3.5 rebase (r209713).Stephen Hines2-5/+2
Change-Id: I0e882c84176d462958db05e4c9c10bfe995b8ed1
2014-05-30Only force MIPS to static relocation if they were using the default.Stephen Hines1-1/+3
Change-Id: Iddb83158f8862087cccea97e3ebcec980b8f044a
2014-05-28Update libbcc for ARM64.Tim Murray1-5/+0
Properly sets NEON/VFP on ARM64. Begins to remove cache from libbcc. Change-Id: I66f50fa20d606c38d5e7af0a6fa8c6e73b2aff32
2014-05-27Fix foreach func vector resize issue.Tim Murray1-1/+5
Change-Id: Ie446319900558bbf5ecb30ee1b874c260197080b
2014-05-21Separate out the symbol resolver from RSCompilerDriver.Stephen Hines1-10/+4
This change makes compilation distinct from loading. The symbol resolvers now need to be instantiated directly by the RS driver. Change-Id: I37ce409f1b2e538d9091c025895e639a250d6466
2014-05-20Fix missing include of Config.h.Stephen Hines1-0/+1
Without this include, we actually fail to configure a non-default target backend. This results in the ARM target never selecting NEON code (even when it is possible to use it). Change-Id: I8891461709ac6a8d174afc5c1def5648b83e6226
2014-05-19Remove unused define from makefile.Stephen Hines1-4/+0
Change-Id: Ie8a17e90f058c85c19dc2bc5c5dff2b256de8c02
2014-05-16Remove unnecessary inheritance for CompilerConfig, as we switch to offline bcc.Stephen Hines4-138/+106
Change-Id: Id4a5be7b2b4627bfa7ef6279eb3b5b8e75915a7d
2014-05-15Fix some minor issues picked up by valgrind.Stephen Hines1-0/+1
Standalone bcc was leaking memory due to misuse of OwningPtr. RSInfo was not clearing a buffer before using only part of it. The whole buffer was being written out in the resulting file, however. Change-Id: Icd455748f81a06d022f1e5ed83a2ab1cae3fef09
2014-05-14Switch RSForEachExpandPass to use MetadataExtractor.Stephen Hines2-58/+48
Change-Id: I442054e7aa2329b369f578052bd41c7a973cc822
2014-05-13Switch to MetadataExtractor path.Stephen Hines2-52/+38
Change-Id: Iabef9abb1c770ffe1e753cfd2fac808f60c19d8a
2014-05-13Refactor RSEmbedInfo pass.Stephen Hines1-16/+19
This change separates out the creation of the InfoString from the actual embedding within the object file. This is important because we want to reuse the InfoString for caching metadata. Change-Id: I2524d39dc25c48fc968108e82c6aa01c1920ff1d
2014-05-09ARCH_ARM_HAVE_NEON should be consistent for aarch64 targets.Stephen Hines1-7/+7
Change-Id: I54979e9215f2a2cbc98641a841a24e32beb417b4
2014-05-06Use ARCH_ARM_HAVE_NEON define instead of cpuinfo to detect NEON support.Stephen Hines1-1/+5
Bug: 14595818 Without this, an ARM64 device may be picked up incorrectly as not having NEON available when running in 32-bit mode. Change-Id: Icddad4d5388022012b392020e15605ec5d601d5f
2014-05-05Remove Makefile->Header code generation from libbcc.Stephen Hines4-8/+0
These variables/defines are not often used and they complicate the use of target information in other Android libraries. Change-Id: I93dc71e17ae8ece1be46a3a609639ec8380cdaf9
2014-04-30Improve standalone bcc for on-device compilation.Stephen Hines1-2/+5
Bug: 7342767 This adds functionality for driver-writers to dynamically load plugins. If such a plugin is loaded, we then execute any function called rsCompilerDriverInit() from it. This function can initialize any other state the driver-writer wants. Change-Id: I733a6a3fc59c429a542cfcaf59a57ad231a19d01
2014-04-23Update libbcc for 64-bit support.Tim Murray7-36/+41
Change-Id: I369a82eb6730a33c46b6700408952fe34020ca51
2014-04-16Enable 64bit elf object handling.WeiTang2-2/+60
Change-Id: Ib952abf882fd9bd0d5cadaa3b204a100bd71aa1e
2014-04-16Merge "Change 64bit library path from /system/lib/ to /system/lib64"Tim Murray2-10/+16
2014-04-09Change 64bit library path from /system/lib/ to /system/lib64WeiTang2-10/+16
Change-Id: Ie2ec537bb71ca6573588bcaf893d871ba9b5c051
2014-04-07Add DISABLE_LLVM_DEVICE_BUILDS to libbcc.Tim Murray4-8/+8
Change-Id: Iaad7b2ea8eea6c89c1c1a3d0e145bbb7bf60c6b9
2014-03-21libbcc: disable more modules for arm64Colin Cross2-0/+6
Disable building libbccSupport and libbccRenderscript for 64-bit Change-Id: Ied29b4eb129f42b1d3ad0a6d71a683d28b3e14be
2014-03-17Fix incorrect memcmp in RSInfoReader.Jean-Luc Brouillet1-1/+1
modified: RSInfoReader.cpp Change-Id: I669cfaeb0eb5354402410b3742f590cfc593d0ba
2014-02-20Fix TBAA: Set path tag metadata to instruction.Logan Chien1-4/+6
This commit replace the old createTBAANode() with the struct-path TBAA introduced after LLVM 3.3. This should fix the possible regression after merging LLVM 3.4. Change-Id: Ie21fe4616784bad467b0f20226fce48da3afb2bd
2014-02-19Provide a flag to disable TBAA for RS (and disable TBAA temporarily).Stephen Hines1-5/+15
Bug: 12977065 This is currently blocking the LLVM 3.4 rebase, since our TBAA pass is causing NULL pointers to be dereferenced. Change-Id: I51cd9d0efc331150970c3054a9cd26f55aa2eb0d
2014-02-19Run verifier on RenderScript .bc modulesTobias Grosser1-0/+9
Verify the bitcode to abort gracefully on invalid .bc modules instead of crashing randomly. This patch will not detect all problems with the bitcode writing, but it is likely to catch attribute breakages such as Bug 9503142. It also prevents us from crashing on the incorrect debug info found in Bug 1031440. Change-Id: I2bf626b7aae173dc7238a499b2a0474301197cbe
2014-02-18Fix disabling global merge option with standalone bcc.Stephen Hines1-3/+4
mConfig will be set before entering setConfig so EnableGlobalMerge needs to be refreshed every time. Change-Id: Ia51e706e717636ea7a87f625256d21bb050da6db
2014-01-29Fix a pointer cast for 64bit.Ian Rogers1-2/+3
Change-Id: I502f46e41a1089bd6f1cd84ddee8e92c35e6ef61
2013-10-03resolved conflicts for merge of 8d972a6f to klp-dev-plus-aospStephen Hines2-3/+3
Change-Id: I7d1f460a1b6de08b11b430f90c7bf2534e5cca31
2013-10-03resolved conflicts for merge of 4293770c to stage-aosp-masterStephen Hines8-30/+20
2013-10-03DO NOT MERGE: Refactor the libbcc runtime for x86 platformJun Tian11-936/+94
This patch refactors the libbcc runtime code to support x86 platform. It removed the redundant x86 code and added the missing functions in libclcore_x86.bc. It resolved the RenderScript failures on the x86 platform. Bug: 9961583 Change-Id: Ieed97e90c7c7691185a88dc425a2dd8c68aeb806 Signed-off-by: Yong Chen <yong.a.chen@intel.com>